RNDr. Ing. Vladimír Smotlacha, Ph.D.

Článek

Katedra počítačových systémů

Článek seznamuje s řešením systému přenosu času po optických vláknech mezi Laboratoří přesného času a frekvence FEL ČVUT (Praha 6, Dejvice) a Laboratoří státního etalonu času a frekvence (Praha 8, Kobylisy).

Stať ve sborníku

10.1109/EWDTS.2016.7807683

Katedra počítačových systémů

This paper deals with a precise time, particularly comparison of diverse precise time transfer methods and sources. We deal with two ways of the precise time acquisition - the dedicated time and frequency transfer infrastructure and the time network protocols. For the needs of distinct time and frequency methods evaluation, we designed a FPGA based System on Chip (SoC) that may acquire time and frequency from dedicated time transfer infrastructure or from a standard TCPIP network utilizing IEEE 1588 or NTP protocol. The SoC is implemented on a Zynq field-programmable gate array (FPGA). We also present an experience with the design and intended applications of our system.

Stať ve sborníku

10.1109/EWDTS.2015.7493161

Katedra počítačových systémů

This paper deals with a new generation of our adapters for atomic clock timescale comparison and other time measurements. Our currently operated adapters are based on Virtex 5 FPGA and the further development on this platform is obsolete. We describe our experience with FPGA based time measurement system consisting of one or two channel interpolating counter. We propose the new design based on the Zynq All Programmable SoC platform and present testing results.

Stať ve sborníku

10.1109/EWDTS.2014.7027081

Katedra počítačových systémů

This paper deals with an accurate time transfer and atomic clocks comparison in a geographically distant locations utilizing the optical lines. A new dual interpolating counter architecture for the clock comparison over an optical network is presented, especially utilizing dense wavelength division multiplexing (DWDM). There are described the time transfer method and the details of the interpolating counter implementation (the interpolator feed and the run time interpolator calibration). Experiences with the current embedded time interval counter design in the FPGA are presented as well.

Stať ve sborníku

10.1109/ICECS.2013.6815506

Katedra počítačových systémů

This paper deals with an accurate time transfer and atomic clocks comparison. It presents an adapter for clock comparison over an optical network, especially utilizing dense wavelength division multiplexing (DWDM). The adapter is a field-programmable gate array (FPGA) based device with DWDM transceivers and frequency synthesis functionality. For the second generation of adapters an embedded interpolating time interval counter in FPGA was developed. We also present results of interpolating counter functionality evaluation in respect to SR620 universal counter.

Stať ve sborníku

10.1109/EWDTS.2013.6673107

Katedra počítačových systémů

The paper describes architecture, design and implementation of accurate time interval counter into the FPGA (field-programmable gate array) structure. We embedded it into the specialized adaptor for time transfer over optical links. We also present achieved results of comparison with precise commercial counter SR-620.